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The xprop tool is specified using the -tool xprop switch on the command line.
This filter will cause the verilog code (ASTs) to be instrumented such that X's are properly propagated by verilog simulation tools. This is used to reduce the simlulated differences between gatelevels representations and RTL. I a properly constructed design flow this greatly reduces the need for gate level simulation (which is much more expensive than RTL simulation). For a detailed description of the transformations done by vrq and the reasoning behind it see the Xprop Rational page.
Vrq adds instrumentation all constructs except clock gating. The switches below may be used to alter the default behavior:
The following switches alter how variables are treated. By default all variables are assume to be able to be 0,1,x,z. You can selectively indicate certain variables can never be x using these switches:
(* NOX *) reg v1; // indicate v1 is never x (* NOX *) wire w1, w2, w3; // indicate w1, w2 and w3 will never be x</pre>
These switch alter other miscellaneous behaviors:
Note these constructs are useful for either visually flagging xprop code or to enable other tools like coverage or synthesis to recognize the instrumentation. For example when the following switches +xprop-begin="coverage off" +xprop-end="coverage on" are used on this code snippet:
if( cond ) begin a = b; end else begin a = b+1; end
This is the resultant output:
if(cond) begin a = b; end else if(~cond) begin a = b+1; end // coverage off else begin a = 1'hx; end // coverage on