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#define bmFR_DEBUG_EN_RX_A (1 << 1) |
#define bmFR_DEBUG_EN_RX_B (1 << 3) |
#define bmFR_DEBUG_EN_TX_A (1 << 0) |
#define bmFR_DEBUG_EN_TX_B (1 << 2) |
#define bmFR_MC_ENABLE_RX (1 << 1) |
#define bmFR_MC_ENABLE_TX (1 << 0) |
#define bmFR_MC_RESET_RX (1 << 3) |
#define bmFR_MC_RESET_TX (1 << 2) |
#define bmFR_MODE_LOOPBACK (1 << 0) |
#define bmFR_MODE_NORMAL 0 |
#define bmFR_MODE_RX_COUNTING (1 << 1) |
#define bmFR_MODE_RX_COUNTING_32BIT (1 << 2) |
#define FR_ADC_OFFSET_0 16 |
Referenced by usrp_basic::set_adc_offset().
#define FR_ADC_OFFSET_1 17 |
#define FR_ADC_OFFSET_2 18 |
#define FR_ADC_OFFSET_3 19 |
#define FR_ATR_MASK_0 20 |
Referenced by usrp_basic_tx::usrp_basic_tx().
#define FR_ATR_MASK_1 23 |
Referenced by usrp_basic_rx::usrp_basic_rx().
#define FR_ATR_MASK_2 26 |
Referenced by usrp_basic_tx::usrp_basic_tx().
#define FR_ATR_MASK_3 29 |
Referenced by usrp_basic_rx::usrp_basic_rx().
#define FR_ATR_RX_DELAY 3 |
#define FR_ATR_RXVAL_0 22 |
Referenced by usrp_basic_tx::usrp_basic_tx().
#define FR_ATR_RXVAL_1 25 |
Referenced by usrp_basic_rx::usrp_basic_rx().
#define FR_ATR_RXVAL_2 28 |
Referenced by usrp_basic_tx::usrp_basic_tx().
#define FR_ATR_RXVAL_3 31 |
Referenced by usrp_basic_rx::usrp_basic_rx().
#define FR_ATR_TX_DELAY 2 |
#define FR_ATR_TXVAL_0 21 |
Referenced by usrp_basic_tx::usrp_basic_tx().
#define FR_ATR_TXVAL_1 24 |
Referenced by usrp_basic_rx::usrp_basic_rx().
#define FR_ATR_TXVAL_2 27 |
Referenced by usrp_basic_tx::usrp_basic_tx().
#define FR_ATR_TXVAL_3 30 |
Referenced by usrp_basic_rx::usrp_basic_rx().
#define FR_DC_OFFSET_CL_EN 15 |
Referenced by usrp_basic_rx::set_dc_offset_cl_enable().
#define FR_DEBUG_EN 14 |
Referenced by usrp_basic::usrp_basic().
#define FR_IO_0 9 |
#define FR_IO_1 10 |
#define FR_IO_2 11 |
#define FR_IO_3 12 |
#define FR_MASTER_CTRL 4 |
#define FR_MODE 13 |
Referenced by usrp_standard_rx::set_fpga_mode(), and usrp_basic::usrp_basic().
#define FR_OE_0 5 |
#define FR_OE_1 6 |
#define FR_OE_2 7 |
#define FR_OE_3 8 |
#define FR_RX_SAMPLE_RATE_DIV 1 |
Referenced by usrp_basic_rx::set_fpga_rx_sample_rate_divisor().
#define FR_TX_SAMPLE_RATE_DIV 0 |
Referenced by usrp_basic_tx::set_fpga_tx_sample_rate_divisor().