5 #ifndef _RTE_ETH_CTRL_H_ 6 #define _RTE_ETH_CTRL_H_ 34 #define RTE_ETH_FLOW_UNKNOWN 0 35 #define RTE_ETH_FLOW_RAW 1 36 #define RTE_ETH_FLOW_IPV4 2 37 #define RTE_ETH_FLOW_FRAG_IPV4 3 38 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4 39 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5 40 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6 41 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7 42 #define RTE_ETH_FLOW_IPV6 8 43 #define RTE_ETH_FLOW_FRAG_IPV6 9 44 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10 45 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11 46 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12 47 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13 48 #define RTE_ETH_FLOW_L2_PAYLOAD 14 49 #define RTE_ETH_FLOW_IPV6_EX 15 50 #define RTE_ETH_FLOW_IPV6_TCP_EX 16 51 #define RTE_ETH_FLOW_IPV6_UDP_EX 17 52 #define RTE_ETH_FLOW_PORT 18 54 #define RTE_ETH_FLOW_VXLAN 19 55 #define RTE_ETH_FLOW_GENEVE 20 56 #define RTE_ETH_FLOW_NVGRE 21 57 #define RTE_ETH_FLOW_MAX 22 63 RTE_ETH_FILTER_NONE = 0,
64 RTE_ETH_FILTER_MACVLAN,
65 RTE_ETH_FILTER_ETHERTYPE,
66 RTE_ETH_FILTER_FLEXIBLE,
68 RTE_ETH_FILTER_NTUPLE,
69 RTE_ETH_FILTER_TUNNEL,
72 RTE_ETH_FILTER_L2_TUNNEL,
73 RTE_ETH_FILTER_GENERIC,
119 #define RTE_ETHTYPE_FLAGS_MAC 0x0001 120 #define RTE_ETHTYPE_FLAGS_DROP 0x0002 127 struct rte_eth_ethertype_filter { 134 #define RTE_FLEX_FILTER_MAXLEN 128 135 #define RTE_FLEX_FILTER_MASK_SIZE \ 136 (RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT) 168 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001 169 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002 170 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004 171 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008 172 #define RTE_NTUPLE_FLAGS_PROTO 0x0010 173 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020 175 #define RTE_5TUPLE_FLAGS ( \ 176 RTE_NTUPLE_FLAGS_DST_IP | \ 177 RTE_NTUPLE_FLAGS_SRC_IP | \ 178 RTE_NTUPLE_FLAGS_DST_PORT | \ 179 RTE_NTUPLE_FLAGS_SRC_PORT | \ 180 RTE_NTUPLE_FLAGS_PROTO) 182 #define RTE_2TUPLE_FLAGS ( \ 183 RTE_NTUPLE_FLAGS_DST_PORT | \ 184 RTE_NTUPLE_FLAGS_PROTO) 186 #define TCP_URG_FLAG 0x20 187 #define TCP_ACK_FLAG 0x10 188 #define TCP_PSH_FLAG 0x08 189 #define TCP_RST_FLAG 0x04 190 #define TCP_SYN_FLAG 0x02 191 #define TCP_FIN_FLAG 0x01 192 #define TCP_FLAG_ALL 0x3F 224 RTE_TUNNEL_TYPE_NONE = 0,
225 RTE_TUNNEL_TYPE_VXLAN,
226 RTE_TUNNEL_TYPE_GENEVE,
227 RTE_TUNNEL_TYPE_TEREDO,
228 RTE_TUNNEL_TYPE_NVGRE,
229 RTE_TUNNEL_TYPE_IP_IN_GRE,
230 RTE_L2_TUNNEL_TYPE_E_TAG,
237 #define ETH_TUNNEL_FILTER_OMAC 0x01 238 #define ETH_TUNNEL_FILTER_OIP 0x02 239 #define ETH_TUNNEL_FILTER_TENID 0x04 240 #define ETH_TUNNEL_FILTER_IMAC 0x08 241 #define ETH_TUNNEL_FILTER_IVLAN 0x10 242 #define ETH_TUNNEL_FILTER_IIP 0x20 244 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \ 245 ETH_TUNNEL_FILTER_IVLAN) 246 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \ 247 ETH_TUNNEL_FILTER_IVLAN | \ 248 ETH_TUNNEL_FILTER_TENID) 249 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \ 250 ETH_TUNNEL_FILTER_TENID) 251 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \ 252 ETH_TUNNEL_FILTER_TENID | \ 253 ETH_TUNNEL_FILTER_IMAC) 289 RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
290 RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
291 RTE_ETH_GLOBAL_CFG_TYPE_MAX,
305 #define RTE_ETH_FDIR_MAX_FLEXLEN 16 306 #define RTE_ETH_INSET_SIZE_MAX 128 311 enum rte_eth_input_set_field { 312 RTE_ETH_INPUT_SET_UNKNOWN = 0,
315 RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
316 RTE_ETH_INPUT_SET_L2_DST_MAC,
317 RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
318 RTE_ETH_INPUT_SET_L2_INNER_VLAN,
319 RTE_ETH_INPUT_SET_L2_ETHERTYPE,
322 RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
323 RTE_ETH_INPUT_SET_L3_DST_IP4,
324 RTE_ETH_INPUT_SET_L3_SRC_IP6,
325 RTE_ETH_INPUT_SET_L3_DST_IP6,
326 RTE_ETH_INPUT_SET_L3_IP4_TOS,
327 RTE_ETH_INPUT_SET_L3_IP4_PROTO,
328 RTE_ETH_INPUT_SET_L3_IP6_TC,
329 RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
330 RTE_ETH_INPUT_SET_L3_IP4_TTL,
331 RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
334 RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
335 RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
336 RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
337 RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
338 RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
339 RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
340 RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
343 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
344 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
345 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
346 RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
347 RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
350 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
351 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
352 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
353 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
354 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
355 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
356 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
357 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
359 RTE_ETH_INPUT_SET_DEFAULT = 65533,
360 RTE_ETH_INPUT_SET_NONE = 65534,
361 RTE_ETH_INPUT_SET_MAX = 65535,
368 RTE_ETH_INPUT_SET_OP_UNKNOWN,
371 RTE_ETH_INPUT_SET_OP_MAX
482 RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
483 RTE_FDIR_TUNNEL_TYPE_NVGRE,
484 RTE_FDIR_TUNNEL_TYPE_VXLAN,
542 RTE_ETH_FDIR_ACCEPT = 0,
544 RTE_ETH_FDIR_PASSTHRU,
610 RTE_ETH_PAYLOAD_UNKNOWN = 0,
615 RTE_ETH_PAYLOAD_MAX = 8,
665 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t)) 666 #define RTE_FLOW_MASK_ARRAY_SIZE \ 667 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT) 726 RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
729 RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
756 RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
763 RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
770 RTE_ETH_HASH_FUNCTION_DEFAULT = 0,
773 RTE_ETH_HASH_FUNCTION_MAX,
776 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \ 777 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)
#define RTE_ETH_FDIR_MAX_FLEXLEN
enum rte_eth_fdir_status report_status
uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN]
uint32_t flex_payload_unit
struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX]
union rte_eth_tunnel_filter_conf::@65 ip_addr
struct rte_eth_ipv4_flow ip
rte_eth_fdir_filter_info_type
union rte_eth_hash_filter_info::@68 info
#define RTE_FLEX_FILTER_MAXLEN
struct rte_eth_hash_global_conf global_conf
union rte_eth_fdir_filter_info::@67 info
enum rte_eth_hash_function hash_func
struct rte_eth_fdir_action action
struct rte_eth_input_set_conf input_set_conf
uint32_t max_flex_payload_segment_num
struct ether_addr inner_mac
struct rte_eth_ipv6_flow ipv6_mask
struct rte_eth_fdir_input input
struct rte_eth_ipv4_flow ipv4_mask
struct rte_eth_ipv4_flow ip
uint32_t max_flex_bitmask_num
struct rte_eth_ipv4_flow ip
uint32_t flex_bitmask_unit
uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN]
struct rte_eth_fdir_flex_conf flex_conf
enum rte_mac_filter_type filter_type
uint64_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]
enum rte_eth_fdir_tunnel_type tunnel_type
enum rte_eth_fdir_filter_info_type info_type
struct rte_eth_ipv6_flow ip
enum rte_eth_tunnel_type tunnel_type
uint16_t flex_payload_limit
uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE]
#define RTE_ETH_INSET_SIZE_MAX
struct rte_eth_input_set_conf input_set_conf
uint8_t mac_addr_byte_mask
struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX]
uint64_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]
enum rte_eth_global_cfg_type cfg_type
enum rte_eth_payload_type type
enum rte_eth_hash_filter_info_type info_type
#define RTE_FLEX_FILTER_MASK_SIZE
enum rte_eth_fdir_behavior behavior
uint8_t bytes[RTE_FLEX_FILTER_MAXLEN]
uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN]
enum rte_tunnel_iptype ip_type
struct rte_eth_ipv6_flow ip
struct ether_addr outer_mac
struct ether_addr mac_addr
uint8_t mask[RTE_FLEX_FILTER_MASK_SIZE]
struct rte_eth_ipv6_flow ip
rte_eth_hash_filter_info_type
struct ether_addr mac_addr