21 #if !defined(__TBB_machine_H) || defined(__TBB_machine_gcc_power_H) 22 #error Do not #include this internal file directly; use public TBB headers instead. 25 #define __TBB_machine_gcc_power_H 34 #if __powerpc64__ || __ppc64__ 37 #define __TBB_WORDSIZE 8 39 #define __TBB_WORDSIZE 4 46 #if __BIG_ENDIAN__ || (defined(__BYTE_ORDER__) && __BYTE_ORDER__==__ORDER_BIG_ENDIAN__) 47 #define __TBB_ENDIANNESS __TBB_ENDIAN_BIG 48 #elif __LITTLE_ENDIAN__ || (defined(__BYTE_ORDER__) && __BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) 49 #define __TBB_ENDIANNESS __TBB_ENDIAN_LITTLE 50 #elif defined(__BYTE_ORDER__) 51 #define __TBB_ENDIANNESS __TBB_ENDIAN_UNSUPPORTED 53 #define __TBB_ENDIANNESS __TBB_ENDIAN_DETECT 59 #define __TBB_64BIT_ATOMICS 1 62 #define __TBB_64BIT_ATOMICS 0 72 #ifndef __TBB_64BIT_ATOMICS 73 #define __TBB_64BIT_ATOMICS 0 81 __asm__ __volatile__(
"sync\n" 83 "lwarx %[res],0,%[ptr]\n\t" 84 "cmpw %[res],%[cmp]\n\t" 86 "stwcx. %[val],0,%[ptr]\n\t" 91 ,
"+m"(* (int32_t*) ptr)
101 #if __TBB_WORDSIZE==8 106 __asm__ __volatile__(
"sync\n" 108 "ldarx %[res],0,%[ptr]\n\t" 109 "cmpd %[res],%[cmp]\n\t" 111 "stdcx. %[val],0,%[ptr]\n\t" 116 ,
"+m"(* (int64_t*) ptr)
119 , [cmp]
"r"(comparand)
126 #elif __TBB_64BIT_ATOMICS 131 int64_t value_register, comparand_register, result_register;
132 __asm__ __volatile__(
"sync\n\t" 133 "ld %[val],%[valm]\n\t" 134 "ld %[cmp],%[cmpm]\n" 136 "ldarx %[res],0,%[ptr]\n\t" 137 "cmpd %[res],%[cmp]\n\t" 139 "stdcx. %[val],0,%[ptr]\n\t" 142 "std %[res],%[resm]\n\t" 145 , [res]
"=&r"( result_register)
146 , [val]
"=&r"( value_register)
147 , [cmp]
"=&r"(comparand_register)
148 ,
"+m"(* (int64_t*) ptr)
151 , [cmpm]
"m"(comparand)
160 #define __TBB_MACHINE_DEFINE_LOAD_STORE(S,ldx,stx,cmpx) \ 161 template <typename T> \ 162 struct machine_load_store<T,S> { \ 163 static inline T load_with_acquire(const volatile T& location) { \ 165 __asm__ __volatile__(ldx " %[res],0(%[ptr])\n" \ 167 cmpx " %[res],%[res]\n\t" \ 170 : [res]"=r"(result) \ 171 : [ptr]"b"(&location) \ 177 static inline void store_with_release(volatile T &location, T value) { \ 178 __asm__ __volatile__("lwsync\n\t" \ 179 stx " %[val],0(%[ptr])" \ 181 : [ptr]"b"(&location) \ 187 template <typename T> \ 188 struct machine_load_store_relaxed<T,S> { \ 189 static inline T load (const __TBB_atomic T& location) { \ 191 __asm__ __volatile__(ldx " %[res],0(%[ptr])" \ 192 : [res]"=r"(result) \ 193 : [ptr]"b"(&location) \ 198 static inline void store (__TBB_atomic T &location, T value) { \ 199 __asm__ __volatile__(stx " %[val],0(%[ptr])" \ 201 : [ptr]"b"(&location) \ 213 #if __TBB_WORDSIZE==8 217 #elif __TBB_64BIT_ATOMICS 219 template <
typename T>
220 struct machine_load_store<T,8> {
224 __asm__ __volatile__(
"ld %[res],0(%[ptr])\n\t" 225 "std %[res],%[resm]\n" 227 "cmpd %[res],%[res]\n\t" 231 , [res]
"=&r"(result_register)
232 : [ptr]
"b"(&location)
241 __asm__ __volatile__(
"lwsync\n\t" 242 "ld %[val],%[valm]\n\t" 243 "std %[val],0(%[ptr])" 245 , [val]
"=&r"(value_register)
246 : [ptr]
"b"(&location)
252 struct machine_load_store_relaxed<T,8> {
253 static inline T
load (
const volatile T& location) {
256 __asm__ __volatile__(
"ld %[res],0(%[ptr])\n\t" 259 , [res]
"=&r"(result_register)
260 : [ptr]
"b"(&location)
266 static inline void store (
volatile T &location, T
value) {
268 __asm__ __volatile__(
"ld %[val],%[valm]\n\t" 269 "std %[val],0(%[ptr])" 271 , [val]
"=&r"(value_register)
272 : [ptr]
"b"(&location)
277 #define __TBB_machine_load_store_relaxed_8 283 #undef __TBB_MACHINE_DEFINE_LOAD_STORE 285 #define __TBB_USE_GENERIC_PART_WORD_CAS 1 286 #define __TBB_USE_GENERIC_FETCH_ADD 1 287 #define __TBB_USE_GENERIC_FETCH_STORE 1 288 #define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1 290 #define __TBB_control_consistency_helper() __asm__ __volatile__("isync": : :"memory") 291 #define __TBB_full_memory_fence() __asm__ __volatile__( "sync": : :"memory") 296 #if __TBB_WORDSIZE==8 297 __asm__ __volatile__ (
"cntlzd %0,%0" :
"+r"(x));
298 return 63-static_cast<intptr_t>(x);
300 __asm__ __volatile__ (
"cntlzw %0,%0" :
"+r"(x));
301 return 31-static_cast<intptr_t>(x);
304 #define __TBB_Log2(V) __TBB_machine_lg(V) 308 #define __TBB_Flag __TBB_Flag 313 #define __TBB_TryLockByte(P) __TBB_machine_trylockbyte(P) static void store_with_release(volatile T &location, T value)
#define __TBB_ASSERT(predicate, comment)
No-op version of __TBB_ASSERT.
static intptr_t __TBB_machine_lg(uintptr_t x)
#define __TBB_MACHINE_DEFINE_LOAD_STORE(S, ldx, stx, cmpx)
static T load_with_acquire(const volatile T &location)
void const char const char int ITT_FORMAT __itt_group_sync x void const char ITT_FORMAT __itt_group_sync s void ITT_FORMAT __itt_group_sync p void ITT_FORMAT p void ITT_FORMAT p no args __itt_suppress_mode_t unsigned int void size_t ITT_FORMAT d void ITT_FORMAT p void ITT_FORMAT p __itt_model_site __itt_model_site_instance ITT_FORMAT p __itt_model_task __itt_model_task_instance ITT_FORMAT p void ITT_FORMAT p void ITT_FORMAT p void size_t ITT_FORMAT d void ITT_FORMAT p const wchar_t ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s no args void ITT_FORMAT p size_t ITT_FORMAT d no args const wchar_t const wchar_t ITT_FORMAT s __itt_heap_function void size_t int ITT_FORMAT d __itt_heap_function void ITT_FORMAT p __itt_heap_function void void size_t int ITT_FORMAT d no args no args unsigned int ITT_FORMAT u const __itt_domain __itt_id ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain __itt_id ITT_FORMAT p const __itt_domain __itt_id __itt_timestamp __itt_timestamp ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain ITT_FORMAT p const __itt_domain __itt_string_handle unsigned long long value
int32_t __TBB_machine_cmpswp4(volatile void *ptr, int32_t value, int32_t comparand)
static void store(T &location, T value)
bool __TBB_machine_trylockbyte(__TBB_atomic __TBB_Flag &flag)
#define __TBB_machine_cmpswp8
static T load(const T &location)